1. Field of the Invention
The present invention relates to digital-to-analog converters using pulse width modulation (PWM) and, more particularly, to a PWM circuit for generating multiple independent output signals.
2. Art Background
It is well known in the art to use microcontrollers in applications such as closed-loop control and digital signal processing. Such applications are utilized in products such as modems, motor controllers, engine controllers, and medical instrumentation, to name just a few. In the field of microcontrollers, it is also well known to use pulse width modulation (PWM) outputs to implement digital to analog (D/A) conversion. Compared to other forms of D/A converters, PWM outputs provide an economical, yet powerful, way of achieving D/A conversion.
An example of such a PWM output circuit can be found implemented in a microcontroller manufactured by Intel Corporation of Santa Clara, Calif., the Assignee of the present application. As illustrated in FIG. 1, the contents of time-base counter 100 (of 8-bit length) is incremented every state time. When the contents of counter 100 equals 0, the PWM output is set high. When the contents of counter 100 matches the value stored in duty-cycle register 120, the PWM output is switched low. This is accomplished through the duty-cycle comparator 110, which activates its match output 150 when the two values are equal. When counter 100 again overflows (contents is 0), the PWM output is again switched high. A typical output waveform with various duty cycles is shown in FIG. 2. Note that when the contents of duty-cycle register 120 equals 0, the PWM output is always low, representing 0% duty cycle. As shown in FIG. 2, the duty cycle can be controlled by the duty-cycle register 120, which can be programmed as the application requires. While the PWM illustrated in FIG. 1 provides for various duty cycles under software control, the period of the PWM cycle is fixed. This PWM configuration is capable of generating only a single PWM output with a fixed frequency and software-controlled duty cycle.
FIG. 3 illustrates another form of prior art PWM implemented in a microcontroller manufactured by Intel Corporation. As shown in FIG. 3, three different PWM outputs can be generated by connecting multiple "PWM channels" (shown here as 310, 320, 330) to the time-base counter 300, each containing its own duty cycle register 311, duty cycle comparator 312, and output flip/flop 314. The overflow signal 340 sets all PWM outputs high at the same time, while each PWM output is switch low independently by the match signal 313. While this approach permits multiple PWM outputs with independent duty cycles, counter 300 determines the period for all the PWM outputs. Thus, this implementation is unsuitable for applications in which the different PWM-driven components require different input frequencies.
A possible improvement to this multiple PWM output generator is to implement a longer time-base counter. As shown in the conceptual block diagram FIG. 4a, a 9-bit time-base counter 400 replaces the 8-bit time-base counter 300. The period of the PWM1 output is defined by the low-order 8 bits of the counter, while the period of the PWM2 output is defined by the high-order 8 bits of the counter. Since the time base defined by the bit-field [8, 1] changes state at half the rate of the time base defined by the bit-field [7,0], the periods of the two PWM outputs differ by a factor of 2. This is an improvement over the method described above in that the periods of the PWM outputs need not be the same, though they are related. The two output waveforms are illustrated in FIG. 4b. Note that the PWM duty cycle is independently specified in each PWM channel's dedicated duty cycle register 412.
While this approach permits two PWM channels to operate with different (though related) periods, as it is shown here the period for each PWM channel is fixed by the hardware. If the overall period of the counter 400 is T, then the period of PWM1 will be T/2, while the period of PWM2 will be T.
An enhancement of this approach, shown in FIG. 5, allows either of the two available periods to be used with each PWM channel. Unfortunately, this additional capability is attained only at the cost of adding a multiplexer 513 at the input to the comparator 515 for each PWM channel. This multiplexer permits the selection of either bits [7,0] or bits [8,1] from the time-base counter 500 to be used as the basis of the PWM period.
More potential PWM periods can be created by increasing the number of bits in the time-base counter 500. However, the size of each multiplexer will be proportional to the number of potential periods (frequencies). Moreover, as a separate multiplexer is required for each PWM channel, the incremental silicon area required for an additional PWM channel is significant.
As described, the present invention allows a single time-base counter to generate concurrent and independent PWM outputs of different (though related) periods. As described, the present invention provides the means for incremental implementation of additional PWM channels with a minimum of additional silicon area.